1. Technical Field
The embodiments described herein relate to a semiconductor integrated circuit and, more particularly, to a test apparatus of a semiconductor integrated circuit and a method for using the same.
2. Related Art
After manufacturing semiconductor integrated circuits based on a design technology, they are tested to confirm whether the circuit features of the manufactured products satisfy the requirement set up in the design. The semiconductor integrated circuits are tested in a test mode using a test apparatus.
As shown in FIG. 1, a conventional test apparatus 30 for the semiconductor integrated circuit includes a fuse signal generating unit 10 and a signal combination unit 20.
The fuse signal generating unit 10 generates a fuse signal ‘fuse_s’ according to whether the fuse is cut. For example, when the fuse is not cut, the fuse signal ‘fuse_s’ is output at a high level and, when the fuse is cut, the fuse signal ‘fuse_s’ is output at a low level.
When a test mode signal ‘TM’ is activated, the signal combination unit 20 generates a test code signal ‘test_code’ in response to a test signal ‘test’. When the test mode signal ‘TM’ is deactivated, the signal combination unit 20 generates the test code signal ‘test_code’ in response to the fuse signal ‘fuse_s’. That is, in a conventional semiconductor integrated circuit, the test code signal ‘test_code’ is generated in response to the test signal ‘test’ when the test mode signal ‘TM’ is activated, and the test code signal ‘test_code’ based on whether the fuse is cut after the completion of the test is generated.
As shown in FIG. 2, in a conventional system, a conventional test apparatus includes a first test mode circuit 40 and a second test mode circuit 50. For convenience in illustration, two test mode circuits are shown; however, more or less test mode circuits can be used.
The first test mode circuit 40 can be provided, for example, to execute a first test mode and can include first to fourth test apparatuses 30_1 to 30_4. Each of the first to fourth test apparatuses 30_1 to 30_4 can be the same as the test apparatus of FIG. 1. Accordingly, when a first test mode signal ‘TM1’ is activated, the first test mode circuit 40 generates first to fourth test code signals ‘test_code1’ to ‘test_code4’ in response to first to fourth test signals “test1-1′ to “test1-4′, respectively. Meanwhile, when the first test mode signal ‘TM1 is deactivated, the first test mode circuit 40 generates the first to fourth test code signals ‘test_code1’ to ‘test_code4’ according to whether the fuses included in the first to fourth test apparatuses 30_1 to 30_4 are cut.
Different kinds of tests (16 types) can be executed in the first test mode by decoding the first to fourth test code signals ‘test_code1’ to ‘test_code4’.
The second test mode circuit 50 can be provided to execute a second test mode and can include fifth to eighth test apparatuses 30_5 to 30_8. Each of the fifth to eighth test apparatuses 30_5 to 30_8 can be the same as the test apparatus of FIG. 1. Accordingly, when a second test mode signal ‘TM2’ is activated, the second test mode circuit 50 generates fifth to eighth test code signals ‘test_code5’ to ‘test_code8’ in response to fifth to eighth test signals ‘‘test2’-1’ to ‘‘test2’-4’. Meanwhile, when the second test mode signal ‘TM2’ is deactivated, the second test mode circuit 50 generates the fifth to eighth test code signals ‘test_code5’ to ‘test_code8’ according to whether the fuses included in the fifth to eighth test apparatuses 30_5 to 30_8 are cut.
Different kinds of tests (16 types) can also be executed in the second test mode by decoding the fifth to eighth test code signals ‘test_code5’ to ‘test_code8’.
As mentioned above, a conventional semiconductor integrated circuit includes a plurality of test apparatuses capable of carrying out, e.g., sixteen kinds of tests in one test mode. For example, when a conventional semiconductor integrated circuit executes testing operations based on ten test modes, it is required to provide ten test apparatuses that each can execute sixteen kinds of tests in one test mode. Therefore, forty test signals are needed in total, because four test signals are input into each of the test apparatuses. That is, in a conventional semiconductor integrated circuit, the greater the number of test modes, the greater the number of test signals that are needed to perform all the test available.
Accordingly, in a conventional semiconductor integrated circuit, the signal lines needed to transmit the test signals occupy a large area, which reduces area-efficiency.